1. Technical Field
The present invention relates to a mesa photodiode and a method for manufacturing the mesa photodiode.
2. Related Art
Since the pn junction in a mesa photodiode can be formed through crystal growth, the position of the pn junction and the electric field distribution can be easily controlled in the mesa photodiode. To secure device reliability, it is necessary to cover the pn junction of the mesa photodiode with a passivation layer. In view of interfacial stability, the passivation layer is preferably a semiconductor layer.
For example, Japanese Laid-open Patent Publication Nos. 2008-66329 and 2004-119563 each disclose a technique of covering the pn junction of a mesa photodiode with a semiconductor layer.
The mesa PIN-PD shown in FIG. 2C of Japanese Laid-open Patent Publication No. 2008-66329 is a structure in which the InGaAs light-absorbing layer of the device is processed into a mesa, the sidewall of the mesa is buried with InP layer, which is regrown. With this arrangement, the contact between InGaAs with a small bandgap and a dielectric passivation film is restrained, or the existence of an interface between InGaAs having insufficient temporal stability and a dielectric layer is restrained. Instead, an interface between wide-bandgap InP having higher temporal stability (with the dark current not increasing with time) and InGaAs is formed, to secure long-term reliability.
In the mesa APD shown in FIG. 7 of Japanese Laid-open Patent Publication No. 2004-119563, the InGaAs light-absorbing layer of the device is processed into a mesa, and the sidewall of the mesa is buried with InP layer, which is regrown, to achieve the same effects as those achieved by Japanese Laid-open Patent Publication No. 2008-66329.
A buried layer formed in a region surrounding a mesa is also disclosed in each of the following references: International Publication Nos. 2006/123410, 2006/046276, and Japanese Laid-open Patent Publication No. 2008-28421.